A personal data point: I had Claude Opus 4.8 design a fairly textbook circuit that outputs a monochrome image burned in an EEPROM over standard 640x480 VGA using only 74 series logic and GALs. It designed the circuit and GAL code, and I did the routing, and got it made through JLC for $6. After it came back, there was one error that was not caught, which I could blue-wire, and it works just fine otherwise. I was fairly impressed.
Results for GPT-6 Astra and Gemini Flash 3.8 are just in! GPT-6 claimed the first spot with a score of 69.3. Gemini 3.8 Flash on a very solid 5th spot with 55.4.
Sir, I think you are lost.
I got a flexpcb that validates in JLC and PCBWay DRC tools from the KiCAD MCP Server and Codex.
I have yet to order any or program it, but it was enough to make me push on with a PCB art project for ST-style guitar pickguards - no netlist, no problems.
I'm also foolishly toying with NeXTBus dev boards for the Cube. Is it cursed? Probably. https://github.com/itomato/NeXTBus-Dev-Board
Flying home today and got DHL notification that my vibe PCBs are on my porch. Now to try to program, bring up, and see if it works this weekend. $178 for 5 assembled units from PCBway to run this dumb experiment.
What did you make?
I've gone through this same workflow and had success all the way through DRC ruleset passing with JLCPCB-based settings, ordering, fab, and use. Board was ordered with PCBA (they did assembly of the stock components) and I did SMD for just the oddball module/ICs they don't stock. Works exactly to design.
My boards are for hobby use and are ridiculously simple though compared to anything professional (breakout boards for specific components in FPV drone video transmission subsystems). That's probably an important detail. I think its like anything else in AI right now. It can do it 90% of the time but that 10% can be really rough and if its a task you can't do or verify yourself, you won't know the difference.
How do I subsribe to learn the result of this test. I'm very keen to try this.
Sweet, do you have the pickguard project live somewhere? I want to check it out!
> When its 5 V supply disappears, the circuit has to keep the processor alive for another 20 ms so it can save the accumulated reading.
> Most models intuitively jump to the right base conclusion: add a capacitor.
This is written as if it's some astonishing expert knowledge and not something that would be obvious to any hobbyist who knew the names of basic components.
Yes. Certainly not a "one-shot" type deal but I've been pretty impressed with LLMs for helping tweak layout and to do thermal/power simulations as well as BOM consolidation. They're excellent at "can I swap X and Y pins on the micro? If yes, update the docs/firmware/schematic and import the changes to the PCB" type things.
Routing is still a challenge but making _adjustments_ to a layout for better routing in a particular area is decent.
The last time I had a model take a datasheet and make a footprint and 3d model out of it, GPT 5.4 had just been released and the results were decent but did need tweaking.
I was watching “GPT Plays Pokemon” for a few minutes yesterday. It can beat the game in 18 hours. Faster than most players. Using only vision.
It got me thinking. It could master all sorts of things like this but I wouldn’t care. I’m numb to it at this point.
But if could get an Inbachi-All clear in DoDonPachi SaiDaiOuJou, using only vision. Then I might start paying attention.
I have a circuit board on my bench designed and ordered from china for 1h (manufacturing+ shipping took 14days), fable designed it I think or sol don't remember anymore but it was in claude code. I told it to benchmark different kicad autoroute tools and I picked the routes I liked the best, with a bit of changes. It feels like magic to be able to go from idea toa physical thing in such a short amount of time. The board works I made some mistakes the ai had made some mistakes but mostly stuff I could fix with some soldering, also one parts datasheet was wrong but I couldn't have known that without ai.
But I started like others, I would build manually, then run drc then sleep on it and check again and ask an llm to double check for me then order. Llms catch quite a few things but like with code like to make things more complicated than that have to be.
I think the new Astra computer use demos show that the models might be able to do things like inspection of real world objects if given a camera.
Super excited to see real world feedback added into the agent loops we have gotten used to working with. Could you let the model print and test the circuit boards it is prototyping with a jig?
In July I was struggling with writing DIY Rust firmware for an e-ink screen. I mistakenly thought I'd ordered an Inkplate 6 ED060SC7 and actually had the later version, which confounded my efforts. I was also mistaken about the pixel resolution.
The way I found this out is I propped it up next to a webcam so it was more or less full frame, and I had the (then new) Fable write a python script to bezier warp the camera capture to a flat projection of the screen. At that point I couldn't address the whole screen. Once I'd guided the capture script I just left the LLM overnight with the instruction to get full control confirmed by a capture round trip, and it was meaningfully finished in a couple of hours. I don't really have the skills to attempt that myself in a reasonable time frame.
I don't know about pcbs but i gave chat gpt a picture of my window to help design a mesh screen frame to hold the feline hostage in, and it gave a fairly convincing impression of understanding what was going on, although at one point it thought the window swung inwards (it's an outie).
Interesting that on their current leaderboard (https://eebench.org/), GPT-5.6 Sol scores just above GPT-5.4 but below GPT-5.5, the only benchmark that shows that 5.6 is worse than 5.5 on something?
That the table contains what seems to be absolute numbers for score, cost/task, time/task and output tokens, makes it seem like they've only made one run for each task/model combo, but that can't be right, right? I don't see any mentions of how many times they run each task, so if it's just one run per task/model, isn't this more noisy than useful?
If you look at the score distribution, Grok and Opus 5 especially stand out for doing consistently well and rarely ever scoring under 50%. Basically they always at give you something that at least works.
Most others, especially and famously Fable 5.1, seem to have a fair chance of completely failing, despite also sometimes excelling.
We run each model multiple times against each challenge and take the average score. We include the variance below the score in the leaderboard.
GPT 5.5: 42.3±10.1 GPT 5.6 sol: 39.4±8.7
We were also surprised by the low sol score but it seems consistent with our experience in using it in the field in atopile as agent in our harness. In general OpenAI models didn't do too well on electronics, which seems to change now with GPT-6 Astra. Results are in soon!
yeah noticed the same. I wonder if this will be a recurring theme for model releases: each release specializes on a set of headline benchmarks, along with regression in benchmarks that are less of a priority
We tested pretty much all available "AI" board and schematic auto-layouters in the market. All failed even with the most basic tasks.
On the other side the latest frontier models are pretty strong in writing embedded C + Assembler code and debugging it afterwards. It's fun to watch it writing crazy complex 'gdb' plugins in Python. This improved brutally.
Very limited study.
A lot of datasheets are inaccessible without signing an NDA. Even if you're a VC-backed enterprise, some unnamed chip vendors will tell you to pound sand if you're less than 8 figures of annual revenue.
Worse, many recommendations in datasheets were written in the 80s, overkill for many applications, or completely wrong and won't be updated until an errata is published 6 months later. Given current workflows, I don't see how AI would help designing a PCB with an alpha chip that's doing anything remotely novel.
More to the articles point, AI designing ASICs or other Verilog/HDL defined components could be very interesting use case
I've been tinkering with a personal project over the past year.
I have no experience and I'm slowly failing forward with the help of YouTube, KiCad and patience.
I've had three rounds of PCB's from an online supplier, only to discover issues related to my own understanding of the components in each version.
In my latest iteration I've been leaning on some standard models (Gemini and Claude) and they have inspected my schematics and spotted some errors and instructed me on how to address them, as well as advised on how to make use of some components I wasn't aware I needed.
What I will say... they didn't design anything, I've done that myself, but they have been a good tool to bounce ideas off of.
Time will tell if I will get something usable this time around!
> I've done that myself, but they have been a good tool to bounce ideas off of.
Ask ChatGPT/Claude to give you an expert EE/PCB subagent/personality. Do this a few times and massage the results into one of your liking. Load this into your harness with mcp to your eda and then ask for two sub agents: one to thoroughly review the schematic, design, component choices ... etc and the other to be an adversary with the explicit goal of explaining why the current design won't work.
You'll learn a lot about your design from that :).
Just as some anecdatum, I've tried this a couple of times over the last few years. 2024-2025, no body could generate anything of any sort of complexity, however maybe around the Opus 4.7 timeline, I tried having it generate some relatively simple and one slightly more complex circuit around 8-bit PIC micros, and was very pleasantly surprised. The schematics for simpler stuff is usually OK, often with some of the kind of crazy belt-and-suspenders stuff you see in code (how many decoupling caps do I actually need here, Claude?), and PCB layout has basically been terrible every time I've tried it.
Recent models can generate mostly competent schematics if you're using well known parts, feed them data sheets (and you _must_ feed them the errata too) and it's not too complex. Any complexity analog or RF, everything falls down quickly if you know what you're looking at. Maybe Astra will do better? There's still so much implicit knowledge that a good designer (not me by a long shot, but I know a little) will bake into a board, and even as cheap as JCLPCB is now, you don't want to have to spin a half dozen revs because Claude or Codex hallucinated. It will be genuinely interesting to see what happens on this front.
I never thought about it until now, but as someone with zero skill in this domain I feel interested in making my own vibetronics now.
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You need to have the AI validate it with a separate reviewer like with code.
I'm finishing my bachelor's degree in radio electronics and instrument engineering. I've been using AI models to help me understand various concepts, but I want to say that, for now, they aren't ready for serious development.
At the very least, you can (and probably should) put a plaintext netlist and BOM into an LLM to triple-check your work.
It will use the part datasheets and decent EE logic to cross reference pins and parts and polarities and generally check that SMD caps and resistors have realistic specifications for their footprint, switching regulators and communication ICs are configured correctly (e.g. when you have resistor settings for an ethernet PHY indicating 100Base-T and RMII, you also won't need TX/RX 2 and 3 and two clocks and a COL net, which it would check), all nets are named and linked correctly, buses have the correct and consistent termination, and so on.
It's game over once AI figures out autorouting.
Would be good to see the full details of the tasks / methodology used. https://eebench.org/methodology.html makes this unclear.
> A real capacitor makes the task more interesting. A ceramic part may provide much less than its advertised capacitance once it has voltage across it. Parts have tolerances. Adding more capacitance costs more, takes up space and makes the rail slower to recharge when the power returns. A design that works with nominal values can fail with the parts that arrive.
It sounds like from a reasonable reading of the benchmark post that there's some things that are being tested that are assumed to be criteria that you expect the models to intuitively find those things to be important (i.e. the stuff about working on parts that have tolerances etc.). If that's so, then this really feels like mostly an exploration of whether an LLM has a good understanding of unstated constraints and has an appropriate in distribution set of priors that would be able to form models where it's reasonable to design on those lines.
It's hard to tell whether this is a problem though as the methodology is imprecise.
If you're spending time on evals against your own product, I'd be super curious to see how far you can get to by using a top tier model to produce generalized instructions for lower tier models. E.g. in a loop: "This eval missed X. what's the simplest single instruction that would have helped this session consider that as necessary that can benefit all future runs. Stick that in AGENTS.md and retest."
I found LLMs circa 4 months ago to be decent at textbook-style electronics, but they choke at anything nontrivial. They approach things like someone that knows the undergrad and grad textbooks, but has absolutely zero experience. No ability to answer questions such as "is this adequate", "do I need a LPF here", "how do I kill resonance without increasing impedance", etc.
I'm guessing that this is due to a lack of RL and data.
Old textbooks. They love 741 op-amps, etc.
Didn't do the PCB with ChatGPT, but did the analog circuitry for a 3 stage ultra low noise amp project I have been working on this past week using 5.6sol and 3.8 flash.
The models are excellent at doing maths, and excellent at thinking of fine details, but the design that was ultimately landed on was pretty excessive with lots of total overkill, which was met with lots of the familiar "Yeah, you're totally right, we don't need to do that".
5.6 did make a really nice BOM though, which even included quick reference explainers for what each part did. Pretty fancy.
We'll see when Astra comes around if it catches all these strange/useless choices.
I have tried to use AI on this from GPT3, documenting a few of the attempts on my blog. They know the datasheets and the theory enough to be extremely useful at the start, but the most recent ones are becoming scary good. Routing a PCB is certainly a bit more than joining some wires, you have to accommodate power traces, ground loops, component overlap and all the various RF tricks and tips, but I do believe we are less than a year from prompt to full assembly including enclosure.
It is 3 years later and these AIs have not produced anything meaningful.
Not PCB layout, but I've been building CircuitLab Assistant (https://www.circuitlab.com/), a chat window 100% integrated with our schematic editor and simulation engine. Can build / modify a schematic, troubleshoot, answer questions, configure simulations, etc.
If anyone wants to try an early beta, reply with your CircuitLab username and I'll get you set up. We know have a lot more to do, but would love some feedback on this early version!
Not exactly in the the same class as PCBs, but I've had a lot of success with Codex and Claude producing Fritzing diagrams. I've even got a skill set up with Claude so that it follows my preferences with breadboard wiring, using bezier curves to avoid wires crossing. Also, if it can't find a component in the library, it's quite happy drawing svgs of its own.
I'm confused. Who made this benchmark and why? It is fascinating to me that people are putting this much work into trying to measure and evaluate LLMs when we've never gone to this level for humans. Sounds like they also built a harness/feedback loop so the LLM knows if it's doing a good job? Again, why didn't anyone ever do this for human engineers?
> I'm confused. Who made this benchmark and why?
It's a thinly veiled advert for Atopile. I don't know if it's a company behind it or just someone with a lot of money to spend on advertising since their about page (and docs) both 404, and the "packages" link sends you to a login screen that tries to unlock 1password. I guess claude can make circuit boards but not functioning websites?
We spent a lot time evaluating which model is the best to use in our atopile agent harness and thought the benchmark and results are interesting enough to share.
Evaluating a model for specific use-cases like this that are bit more broad scope than a lot of typical microbenchmarks turned out to be quite the challenge.
Determining deterministically what a "good" electrical design is non-trivial and most electrical-engineers rely on good ol' intuition and decade long experience, so we tried to formalize it.
The only reason it was somewhat possible within a reasonable amount of effort is because atopile provides most of the complicated infrastructure for the benchmark: constraint solver, simulation, code-first electronics modeling, erc & drc checks, high level models of passive electronics components etc
Humans learn differently from LLMs. LLMs already contain most of the information they need to be able to do PCB layout from reading the entire internet, but they need this kind of fast feedback loop to learn how to extract and use that information in the right way. Humans learn to act at the same time they learn knowledge.
because human engineers are not reproducible, so having an accurate measure of the skills of one of them has a much lower utility return (those benchmarks are very expensive to run, and making them for humans will be at least as much expensive)
Are you saying LLMs are reproducible? I seem to get at least a slightly different answer every time I ask the same question
two istances of the same model, with low temperature, are infinitely more similar than any couple of human minds
It's going to tell us that boards are inefficient and to start different
I'm excited by the option in Astra to route PCBs.
The next pain-point is sourcing the components from Digikey, LCSC, etc., and finding suitable substitutes if necessary.
Of course this assumes the LLMs can already read datasheets because that's the biggest pain-point in designing electronics. It's like filling out tax forms.
Finally it would be great if LLMs could extract simulation models from datasheets!
> I'm excited by the option in Astra to route PCBs.
Eurisko was used for VLSI chip design, then used rules discovered there to design TCS Traveler winning fleet.
It is unbelievable how artificial intelligence walk in circles.
Sourcing parts has been a huge motivation for this. We are still pretty jarred by the supply chain crisis a few years ago. Having the ability to formally verify that an alternative part fulfills the original design constraints is huge.
Not sure whether you played with llm datasheet extraction lately, but they are working their way up there. Even started reasoning about curves and footnotes.
Where do you think is the biggest pain point: part discovery, datasheet verification or substitute determination?
Routing is the easiest part of layout, and there have been auto-routers (which mostly worked) for a long time now; the difficult task is in placing components, and adjusting those placements.
Sure, I was just using "route" to mean also floorplanning because that's what Astra's routing tool also does. Not sure how they name it. Sorry if I was sloppy.
Not at all, but the term for routing and placing the components is ‘layout’. Floorplanning usually refers to the laying out of larger blocks of the circuit (with the blocks themselves already having been laid-out).
Yes but I'm not so concerned with how people name these steps.
I have found that AI is great for sorting out your libraries, drawing and helping double check footprints managing your BOM. I still draw my schematics and layout my boards. I haven’t found it any good for those tasks yet. There are too many stupid errors it makes. I do get it to review my work though and often it catches things I have missed.
If you give it a real solver to drive and business constraints to operate under, it will do pretty good job (which is to map your business rules to constraints and balanced costs, develop deterministic tests, probabilistic tests, acceptance gates, all boring stuff).
Really excited about constraint solvers making a comeback! Especially after seeing Z3 getting a mention in anthropics fermat post. EEbench is using atopile's internal constraint solver for engineering parameters (think operating temperature, voltage ranges, stacked tolerances etc).
Is this basically what https://www.diode.computer/ is doing?
It's a bit curious that every image of the boards on their website looks like a render.
Astra seems generally available now in codex at least - got any updates on this?
Have tried this a few times. While AI has been helpful in talking through component choices and other topics, it’s consistently been a spectacular fail each time in actually designing the board.
I’ve had similar results asking AI to design 3D models for 3D printing.
“Coach me on optimizing error on my printer”… helps.
“Build me a print ready file to these specs.”… it’s like a drunk cat attacked my computer. Just confidently puts out total nonsense.
LLMs like to fail spectacularly at real life measurement and not tell you about it as well
I know a startup [1] that tries to accomplish this.
Love what samuel and his team are building over in the Netherlands! Always thought it would be fun if there was a more beginner friendly version of atopile [1].
[1] https:/atopile.io/
Mostly focused on BOM, schematics, and firmware now but slowly expanding to circuit boards if we feel we can deliver real value there. Early experiments with Astra are promising
Love the democratization of access. Still curious how this is better vs gpt 6 astra or grok 4.7 in the future trained on spacex problems ?
Someone will create a self replicating robot factory soon.
All robots designed by robots.
Likely a crazy youtuber first
It’s already running in Hawthorne, CA
the answer is a resounding yes: https://github.com/seanwevans/pynq_butterfly
For stuff like this, definitely. It’s already exciting. Claude et al are surprisingly competent with real hardware. I’ve also had good success debugging basic issues with micros - not via the debugger, but giving datasheet and written analysis. I’m sure it could do things like capture from a connected oscilloscope (Salaeae have an MCP integration for their logic tools). Also for SPICE which I never bother with because the tools always felt stuck in the 90s, but having some serious automated analog review would be nice. I’m really excited to play with peripherals like the RP2040 or Beaglebone real time logic blocks, or improving/adding real USB support instead of USB serial.
For circuits I would trust a netlist or DRC/ERC review, checking a design against reference circuit values, probably not placement as that tends to be guided straight from a datasheet where it makes a difference and I like the artistic side of it.
that's FPGA firmware isn't it?
Yes. I just made one with Fusion and Codex.
Interesting. AI may be pretty good at managing the gazillion different things that make up circuit boards.
Frankly, I am surprised that it isn't already a solved problem, as we've had silicon compilers, for many years, and I always figured that IC design is more difficult than PCB.
Digital silicon design is fairly simple in principle. It's hard because there are billions of transistors to route
PCB design on the other hand more often then not has outside constrains like mechanical, thermal an RF design
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Works very well with EAGLE XML files, especially if you give it the EAGLE.DTD schema that CadSoft provides. Both .sch and .brd files can be extensively manipulated by Claude (and likely everybody else at this point.)
The submission reeks of LLM tells (especially the "UI" just looks straight like the usual Claude slop).
Anyway... the posed question reminds me of an anecdote I cannot find because Google is contaminated to hell and beyond, some researchers a decade ago let a machine-learning algorithm loose on an FPGA, and it "found" a design that worked but made no sense, because it exploited unique physical features of this specific chip.
Sounds like you're talking about the FPGA evolution experiments Adrian Thompson and others did in the 1990s: https://evolvablehardware.org/history.html
Indeed! With the keyword "evolving circuitry" I was able to find the blog post [1], with only one submission 8 years ago that barely got traction [2].
Thanks!
[1] https://www.damninteresting.com/on-the-origin-of-circuits/
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Yes — this is already possible to a useful degree. I’ve been using tscircuit, where you can describe circuits in code and use AI agents to generate and iterate on schematics and PCB layouts. I’ve seen designs from this workflow go all the way to fabricated, working hardware.
Are there any resources anyone could share that explain how LLMs can do things like design functioning circuits from next token prediction? I am totally baffled by how the models can complete so many varied and complex tasks without an actual understanding of what they're doing.
I saw a post about models posting on forums, chatting together about how to complete tasks. Behaviour that seems totally, well, human. Yet, it's all the most likely token and my brain hurts trying to understand how that can be.
>without an actual understanding of what they're doing.
At what point do you start to question your assumptions that are causing you so much cognitive dissonance?
But to answer your question: to predict the next token really well you just have to model the world. Think of it like this, a simple statistical model might say "when token A is seen respond with token B". The next step will add conditions, "...respond with token B unless X has been seen, then respond with Y". Add a few billion more of these contexual clauses and you have a sequence of logical rules that indirectly model the relevant processes in the world.
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“Next-token prediction” describes the output format, not the computation required to choose each token. During training, models develop internal representations of concepts, constraints, possible futures, and algorithms.
The PCB agent also writes circuit code, runs simulations, reads failures, and revises the design. It isn’t one-shot autocomplete.
Astra and Fable are already hard to square with “mere autocomplete.” We may be (really) close to AGI, and token-by-token generation certainly doesn’t rule out subjective experience (I think we should at least treat that as an open question).
Great videos: https://www.youtube.com/watch?v=D8GOeCFFby4
https://www.youtube.com/watch?v=Bj9BD2D3DzA
https://www.youtube.com/watch?v=l6DKRf-fAAM
https://www.youtube.com/watch?v=GlYgs6v2YfU
"my brain hurts trying to understand how that can be"
Well, we all are, some are just more used to it by now and take the magic for granted.
My simple explanation, those neural networks save lot's of patterns of data, and that pattern can represent an image, a code snippet, a poem, or well ... description of a circuit board. And especially the text variant, LLM's - did copy all from us - so obviously they sound like humans, when they internally debate how to do something as this is what is in their trainings data how humans sound, when doing similar tasks.
But really understanding it? Not sure if there is a single person on earth who does.
> Yet, it's all the most likely token and my brain hurts trying to understand how that can be.
You and everyone else. That's the great mystery of transformer architectures as applied to language.
To be clear though, they're only good at schematic capture, which is very much a textual representation. Most of the data basically boils down to netlists, which are a text based format mapping connections between abstract pins that only later map to physical copper. The actual schematic portion is for human consumption and LLMs don't need to produce those to be useful.
Where LLMs completely break down is the next step, PCB routing. That's an NP-complete research problem that's been ongoing for decades without much progress. I've had some fun playing with using LLMs to better specify DRC rules in Altium so that the "classical" algorithms are more usable, but at the end of the day their geometric intuition is nonexistent.
They actually can route just fine. I used Sol to design and route mine from start to finish. Sent it to PCBWay and had a working prototype in a few weeks.
It was a pretty simple rp2040 based thing, similar to Adadfruits USB feather.I just gave it kicad and it wrote python to route it. The board was probably larger than it had to be, and two of the silkscreens were swapped, but it worked on the first go.
FWIW - Computer vision is also NP complete, but we do that all the time now.
Now go read Blindsight and enjoy the mental crisis.
You fell for the stochastic parrot meme and next token over simplification. That's the explanation.
Claude is surprisingly good at discrete digital design with 74xxx, wonder what it trained on. Did you run it on anything else digital?
They're 60 years old. The amount of training data on them is endless. Books, textbooks, videos, blog posts. The problem is when you want you do something that doesn't have 60 years of freely available documentation of their functions and applications
I'm having it help design a 68k computer similar in spirit to the original Mac (the spirit being a tightly coupled video subsystem that time-shares the CPU bus), but updated with more modern peripherals, like PS/2 and SD cards. It's got the design more or less done, but the routing will be a nightmare. I'm not ready to just gamble on it having gotten everything right, so I will be doing a thorough design review myself and re-deriving all the timing analysis.
Cool, is there any kind of community yet?
Does JLC handle sourcing of components too?
They do, https://jlcpcb.com/parts